X-NAND architecture enables NAND flash memory with lower cost and higher performance
SAN JOSE, Calif.– NEO Semiconductor™, the developer of innovative X-NAND™ architecture, today announced the company has been granted two U.S. patents under the title “Methods and Apparatus for NAND Flash Memory.” These patents describe new ways to program and access NAND flash memory including inventions related to buffering, reading, and writing techniques. The X-NAND architecture addresses a large and unmet requirement for designing the next generation of NAND flash memory without disrupting fabrication processes or impacting any cell and array design structures.
The X-NAND architecture deploys as a design solution, delivering precise control with benefits for any flash memory including SLC, MLC, TLC, QLC, and PLC technologies. Typically, X-NAND lowers costs by reducing page buffer size by 94 percent, which enables the array to be divided into 16 to 64 planes without increasing the die size while increasing performance 27X for sequential reads, 15X for sequential writes, and 3X for random reads and writes. X-NAND design options can reduce die sizes by up to 33 percent while lowering cost and increasing performance.
The ability to design a product portfolio with unique outcomes makes X-NAND suitable for many manufacturers of storage applications, devices, and modules.
According to Jay Kramer, chairman of the Flash Memory Summit awards program and president of Network Storage Advisors Inc., “When considering the cost, speed, and other benefits with power, cooling and footprint efficiencies delivered by X-NAND, it’s no wonder NEO Semiconductor won a Best of Show Award for Most Innovative Flash Memory Startup at Flash Memory Summit 2020.”
Intellectual property (IP) is the lifeblood of the semiconductor and memory industry, so developing critical IP shapes future technology. These X-NAND patents join the NEO Semiconductor portfolio to demonstrate that innovation can enable game-changing outcomes. Also, these latest patents reflect a continuing focus on invention and innovation and set the stage for further advancement and rapid commercialization of X-NAND enhanced flash memory.
The X-NAND architecture by NEO Semiconductor supports all 3D NAND layer counts and bit cell generations to enable flash memory manufacturers to deliver more innovative products. X-NAND lowers flash memory costs by minimizing page buffers, die sizes, and power consumption. Also, X-NAND accelerates flash memory performance by increasing parallelism
and throughput during reads and writes. Products incorporating X-NAND will advance new use cases and grow market share for SLC, MLC, TLC, QLC, and PLC flash memory.
About NEO Semiconductor
NEO Semiconductor is a technology innovator focused on the next generation of 3D NAND flash memory technology. The company was founded in 2012 by Andy Hsu and a team in San Jose, California. The company currently owns 22 U.S. patents in-memory design architectures and cell structures. In 2018, the company made a breakthrough in 3D NAND architecture named X-NAND. X-NAND can achieve SLC speed with TLC and QLC densities. This provides a high-speed, low-cost solution for 5G, AI, and many applications.