X-SRAMTM
5× Higher AI
On-Chip Memory
X-SRAMTM
5x Higher AI On-Chip Memory
X-SRAM is a next-generation AI on-chip memory technology that replaces conventional 6T SRAM with a novel 2-transistor architecture, delivering up to 5× higher memory density to enable 1–2 GB of on-chip memory to break the AI memory wall.
Key Highlights
Up to 5× Higher Memory Density
Enable 1-2 GB On-Chip Memory
Innovative 2T Cell Structure
Nanosheet CMOS Compatible
A Roadmap to Future 3D SRAM
The AI Memory Challenge
AI systems rely on two key memories: HBM for storing large AI models and SRAM for high-speed on-chip computation. Conventional SRAM uses a six-transistor (6T) cell to store each bit, resulting in a relatively large cell size. SRAM scaling has largely plateaued at approximately 0.021 μm² since the 5 nm generation, creating the AI memory wall. As a result, today’s AI processors typically integrate only 200–400 MB of on-chip SRAM, limiting AI performance.
Delivers 5x Higher Density
X-SRAM replaces conventional 6T SRAM with a novel 2-transistor architecture, delivering up to 5× higher density with SRAM-class performance. Fully compatible with standard nanosheet CMOS processes, X-SRAM enables seamless integration into today's 2–3 nm logic nodes and future technology generations.
X-SRAM Cell Family
The X-SRAM cell family features multiple architectures optimized for different applications and foundry processes.
Type A
Dual-gate
Blanced size and process compatibility
Type B
Two-transistor
Full compatible to standard nanosheet process
Type C
One-transistor
Minimum cell with minor process modification
Type D
Multi-gate
Adjustable operating voltage for wide range of application
X-SRAM Cell Family
The X-SRAM cell family features multiple architectures optimized for different applications and foundry processes.
Type A
Dual-gate
Blanced size and process compatibility
Type B
Two-transistor
Full compatible to standard nanosheet process
Type C
One-transistor
Minimum cell with minor process modification
Type D
Multi-gate
Adjustable operating voltage for wide range of application
Roadmap to 3D SRAM
X-SRAM's simplified cell architecture and minimal interconnect provide a scalable foundation for future 3D SRAM. By overcoming the scaling limits of conventional SRAM, X-SRAM delivers up to 5× higher 2D density today and enables 20–40× greater on-chip memory capacity through future 3D stacking.